Designed a custom STM32F405-based flight controller PCB for FPV drones running Betaflight firmware with a custom target configuration (ETHANF405). Engineered a dual-LDO power architecture (AP2112K-3.3 for logic/VDDIO and TLV733P-3.3 for IMU VDD) to strictly isolate noisy logic rails from the sensitive IMU power rail. When supply chain constraints rendered the original 426xx IMU family unavailable, this dedicated rail isolation allowed a seamless migration to the Bosch BMI270 gyro with only footprint and decoupling changes and zero power redesign. An onboard TPS5450 buck converter steps down raw 4S LiPo voltage to 5V/5A, compensating for the lack of a BEC on the mating Flycolor Raptor BLS-04 4-in-1 ESC. Features 16MB SPI NOR Flash (BY25Q128ES) for blackbox logging, FlySky FS-iA6B i-BUS receiver interface, and staged-jumper power isolation for safe bench bring-up.

Implemented a two-factor authentication lock in bare-metal C on an ATmega328PB Xplained Mini. A 4x4 membrane switch keypad feeds a 30ms software debouncer that filters contact bounce on each keypress. A strcmp() call checks the entered 4-digit code, and on match, the firmware sends a prompt over UART to a connected terminal for a second password. A correct password triggers Timer1 in Fast PWM mode to output a 2.0ms duty-cycle pulse, actuating a Datan B1122 servo to unlock for 5 seconds. State transitions are managed entirely through ISRs.

Designed and implemented a 10-bit synchronous up/down counter in VHDL on an Artix-7 Basys3, integrating four modular subcomponents into a synthesized top-level architecture. The counter operates over a 0-to-1000 range, with each clock pulse triggered manually via the debounced center push button (BTNC). Direction (SW13), synchronous preset from SW0–SW9 (SW14), and asynchronous reset (SW15) are all switch-controlled. The binary output is converted to four-digit BCD by a standalone converter, then displayed on the 7-segment array via time-division multiplexing.

Designed and verified a complete CMOS cell library from scratch in Tanner EDA, targeting a 250nm process (Generic_250nm_Devices, W/L = 1.5μm/250nm), progressing from individual transistor layouts up to a 2-bit parallel adder placed within a full pad frame.

The CMOS inverter cell was laid out manually at 21.3 × 12.5 μm, confirmed with DRC, then re-generated via Schematic Driven Layout (SDL) from a T-Spice netlist export to cross-validate both flows. DC sweep produced a VTC with a switching threshold near 1.7V — below the ideal 2.5V midpoint due to the NMOS electron mobility advantage over the matched-width PMOS. Transient simulation at 50 MHz (20ns period, 1ns rise/fall) confirmed clean inversion. Subsequent labs added NAND/NOR, transmission gate, and D flip-flop cells, all reused as subcomponents in the final design: a 2-bit parallel adder (2 FA, 8 DFF, 3 TG, 1 inverter) placed within a pad frame, with a WRITE-controlled transmission gate output buffer and synchronous CK/_CK control interface.

Wrote the C-based control firmware for an autonomous mobile robot on a Wallaby controller (kipr/wombat.h) with touch sensors, IR reflectance, CdS photoresistors, an E.T. distance sensor, and a USB camera.

Labs built up through reactive, Braitenberg, and closed-loop control paradigms. Lab 3 fused touch-sensor obstacle avoidance with IR-based line following into a single behavior-priority loop. Lab 4 implemented a Braitenberg light-follower: raw CdS readings (100–4000 range) normalized to 0–100% motor power, with a meta-sensing counter that detected repetitive bump cycles within a fixed time window and injected a random escape maneuver to break the loop. Lab 5 added a PID wall-following controller using the E.T./IR sensor, with data logged to arrays and plotted in MATLAB to compare P-gain values.